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authorSubrata Banik <subrata.banik@intel.com>2021-06-04 16:50:29 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-06-05 19:54:53 +0000
commit66a5d40a5d4ec267cac130e3962ad4f51dc089ff (patch)
treeb4d17069ea57cff42ea129eb226feff1f428403c /src/ec/hp
parent2cfb83fcf360b8d688f003eeb557111c5961e312 (diff)
mb/intel/sm: Use device aliases
Use the device aliases provided by alderlake chipset.cb instead of the raw pci device+function. Take advantage of the default states in chipset.cb and only list the devices that are enabled for all shadowmountain board variants. TEST=Dump devicetree device enable list without and with this CL, no difference observed. Change-Id: I2b769d653ad8ad8ff069a0787d00ff33ead5c912 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55206 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/ec/hp')
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