summaryrefslogtreecommitdiff
path: root/src/ec/google/chromeec
diff options
context:
space:
mode:
authorKarthikeyan Ramasubramanian <kramasub@google.com>2024-11-05 09:49:04 -0700
committerKarthik Ramasubramanian <kramasub@google.com>2024-11-06 22:42:52 +0000
commitede97c29c6f3307f0098e85a6aef998cb2f773f1 (patch)
tree0118813a9d7f3fd9cd8bfd1b2b4e7510bbd9c065 /src/ec/google/chromeec
parent34cbfae8b6d01c7dcbaba6891ec2f4ffb234efc3 (diff)
ec/google/chromeec: Fix typo in google_chromeec_get_pd_chip_info
An unintended suffix got added in google_chromeec_get_pd_chip_info. Fix the typo by removing that suffix. BUG=None TEST=Build Brox BIOS image and boot to OS. Change-Id: I76048ec1ed6b4387098fecf35ccc5b1c1742abb0 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85005 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/ec/google/chromeec')
-rw-r--r--src/ec/google/chromeec/ec.c2
-rw-r--r--src/ec/google/chromeec/ec.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index 38f7e87b81..af5c235309 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -1170,7 +1170,7 @@ int google_chromeec_get_num_pd_ports(unsigned int *num_ports)
return 0;
}
-int google_chromeec_get_pd_chip_infoi(int port, int renew,
+int google_chromeec_get_pd_chip_info(int port, int renew,
struct ec_response_pd_chip_info *r)
{
const struct ec_params_pd_chip_info p = {
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h
index 5a65f2dee7..31c76714b9 100644
--- a/src/ec/google/chromeec/ec.h
+++ b/src/ec/google/chromeec/ec.h
@@ -346,7 +346,7 @@ int google_chromeec_get_num_pd_ports(unsigned int *num_ports);
*
* @return 0 if ok, -1 on error
*/
-int google_chromeec_get_pd_chip_infoi(int port, int renew,
+int google_chromeec_get_pd_chip_info(int port, int renew,
struct ec_response_pd_chip_info *r);
/* Structure representing the capabilities of a USB-PD port */