diff options
author | Won Chung <wonchung@google.com> | 2021-11-15 21:19:51 +0000 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-22 15:12:01 +0000 |
commit | 667471b8d807da5a5a9277db47e069ad3b1351c7 (patch) | |
tree | 09e3ac71f271b1f4958fabebb6d8f0bbdbfd7b96 /src/ec/google/chromeec | |
parent | c47beec2d3695348f75e0fad16e3cafb668ff0d3 (diff) |
ec/google/chromeec: Add PLD to EC conn in ACPI table
Given EC CON and associated USB port objects, custom_pld or pld_group
information is retrieved from port and added to ACPI table as _PLD field
for typec connector.
BUG=b:202446737
TEST=emerge-brya coreboot & SSDT dump in Brya test device
Signed-off-by: Won Chung <wonchung@google.com>
Change-Id: Ibc56ecd4e8954ffaace3acd9528a064b5fa2cf6f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/ec/google/chromeec')
-rw-r--r-- | src/ec/google/chromeec/ec_acpi.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c index 059836485f..4fcc679d70 100644 --- a/src/ec/google/chromeec/ec_acpi.c +++ b/src/ec/google/chromeec/ec_acpi.c @@ -2,6 +2,7 @@ #include <acpi/acpi.h> #include <acpi/acpi_device.h> +#include <acpi/acpi_pld.h> #include <acpi/acpigen.h> #include <acpi/acpigen_ps2_keybd.h> #include <acpi/acpigen_usb.h> @@ -117,6 +118,27 @@ static void add_port_location(struct acpi_dp *dsd, int port_number) acpi_dp_add_string(dsd, "port-location", port_location_to_str(port_caps.port_location)); } +static void get_pld_from_usb_ports(struct acpi_pld *pld, + struct device *usb2_port, struct device *usb3_port, + struct device *usb4_port) +{ + struct drivers_usb_acpi_config *config = NULL; + + if (usb4_port) + config = usb4_port->chip_info; + else if (usb3_port) + config = usb3_port->chip_info; + else if (usb2_port) + config = usb2_port->chip_info; + + if (config) { + if (config->use_custom_pld) + *pld = config->custom_pld; + else + acpi_pld_fill_usb(pld, config->type, &config->group); + } +} + static void fill_ssdt_typec_device(const struct device *dev) { struct ec_google_chromeec_config *config = dev->chip_info; @@ -126,6 +148,7 @@ static void fill_ssdt_typec_device(const struct device *dev) struct device *usb2_port; struct device *usb3_port; struct device *usb4_port; + struct acpi_pld pld = {0}; if (google_chromeec_get_num_pd_ports(&num_ports)) return; @@ -146,6 +169,8 @@ static void fill_ssdt_typec_device(const struct device *dev) usb4_port = NULL; get_usb_port_references(i, &usb2_port, &usb3_port, &usb4_port); + get_pld_from_usb_ports(&pld, usb2_port, usb3_port, usb4_port); + struct typec_connector_class_config typec_config = { .power_role = port_caps.power_role_cap, .try_power_role = port_caps.try_power_role_cap, @@ -156,6 +181,7 @@ static void fill_ssdt_typec_device(const struct device *dev) .orientation_switch = config->mux_conn[i], .usb_role_switch = config->mux_conn[i], .mode_switch = config->mux_conn[i], + .pld = &pld, }; acpigen_write_typec_connector(&typec_config, i, add_port_location); |