ec/google/chromeec: Add EC Mux device

Introduce an EC Mux ACPI device, which will control retimer and discrete
(off-AP) mux configuration.

BUG=b:208883648
TEST=None
BRANCH=None

Change-Id: Ia2022810292783583ee5f09ce29a63b96686dbb8
Signed-off-by: Prashant Malani <pmalani@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

1 files changed, 43 insertions, 0 deletions

diff --git a/src/ec/google/chromeec/mux/conn/conn.c b/src/ec/google/chromeec/mux/conn/conn.c
new file mode 100644
index 0000000000..43f5595aa7
--- /dev/null
+++ b/src/ec/google/chromeec/mux/conn/conn.c
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <acpi/acpigen.h>
+
+static const char *conn_acpi_name(const struct device *dev)
+{
+	static char name[5];
+	snprintf(name, sizeof(name), "CON%1X", dev->path.generic.id);
+	return name;
+}
+
+static void conn_fill_ssdt(const struct device *dev)
+{
+	const char *name;
+	name = acpi_device_name(dev);
+	if (!name)
+		return;
+
+	acpigen_write_scope(acpi_device_scope(dev));
+	acpigen_write_device(name);
+
+	acpigen_write_name_integer("_ADR", dev->path.generic.id);
+
+	acpigen_write_device_end();
+	acpigen_write_scope_end();
+}
+
+static struct device_operations conn_dev_ops = {
+	.read_resources	= noop_read_resources,
+	.set_resources	= noop_set_resources,
+	.acpi_name	= conn_acpi_name,
+	.acpi_fill_ssdt	= conn_fill_ssdt,
+};
+
+static void conn_enable(struct device *dev)
+{
+	dev->ops = &conn_dev_ops;
+}
+
+struct chip_operations ec_google_chromeec_mux_conn_ops = {
+	CHIP_NAME("CrosEC Type C Mux device")
+	.enable_dev	= conn_enable,
+};