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authorRob Barnes <robbarnes@google.com>2021-09-17 10:24:45 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-09-22 13:43:57 +0000
commit5ab146674c5e95f9910b3edae88fbb5dd35aaeb4 (patch)
tree193046b11eb202092e6eec2539177bc92a26be77 /src/ec/google/chromeec/ec_commands.h
parentc38d92789901002faf6cd1c64c689d29ab269e2e (diff)
ec/google/chromeec: Update ec_commands.h
This change copies ec_commands.h directly from Chromium OS EC repo at sha 8c2c6bd5b1d44b367929af498d4d4b0df126a4ef. BUG=b:188073399 TEST=Build coreboot BRANCH=None Change-Id: I674cb860adb6b8497a8aecf47952ed8f85ddaa70 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57758 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org>
Diffstat (limited to 'src/ec/google/chromeec/ec_commands.h')
-rw-r--r--src/ec/google/chromeec/ec_commands.h27
1 files changed, 25 insertions, 2 deletions
diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h
index 594d2ee5b3..e8b028f822 100644
--- a/src/ec/google/chromeec/ec_commands.h
+++ b/src/ec/google/chromeec/ec_commands.h
@@ -1146,7 +1146,7 @@ enum ec_image {
};
/**
- * struct ec_response_get_version - Response to the get version command.
+ * struct ec_response_get_version - Response to the v0 get version command.
* @version_string_ro: Null-terminated RO firmware version string.
* @version_string_rw: Null-terminated RW firmware version string.
* @reserved: Unused bytes; was previously RW-B firmware version string.
@@ -1155,10 +1155,31 @@ enum ec_image {
struct ec_response_get_version {
char version_string_ro[32];
char version_string_rw[32];
- char reserved[32];
+ char reserved[32]; /* Changed to cros_fwid_ro in version 1 */
uint32_t current_image;
} __ec_align4;
+/**
+ * struct ec_response_get_version_v1 - Response to the v1 get version command.
+ *
+ * ec_response_get_version_v1 is a strict superset of ec_response_get_version.
+ * The v1 response changes the semantics of one field (reserved to cros_fwid_ro)
+ * and adds one additional field (cros_fwid_rw).
+ *
+ * @version_string_ro: Null-terminated RO firmware version string.
+ * @version_string_rw: Null-terminated RW firmware version string.
+ * @cros_fwid_ro: Null-terminated RO CrOS FWID string.
+ * @current_image: One of ec_image.
+ * @cros_fwid_rw: Null-terminated RW CrOS FWID string.
+ */
+struct ec_response_get_version_v1 {
+ char version_string_ro[32];
+ char version_string_rw[32];
+ char cros_fwid_ro[32]; /* Added in version 1 (Used to be reserved) */
+ uint32_t current_image;
+ char cros_fwid_rw[32]; /* Added in version 1 */
+} __ec_align4;
+
/* Read test */
#define EC_CMD_READ_TEST 0x0003
@@ -5852,7 +5873,9 @@ struct ec_params_usb_pd_mux_info {
#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
+#define USB_PD_MUX_HPD_IRQ_DEASSERTED 0 /* HPD IRQ is deasserted */
#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
+#define USB_PD_MUX_HPD_LVL_DEASSERTED 0 /* HPD level is deasserted */
#define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */
#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
#define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */