diff options
| author | Divya Sasidharan <divya.s.sasidharan@intel.com> | 2019-10-22 13:41:15 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-14 05:37:40 +0000 |
| commit | 49d74de9690b448e16497483365a94f500f97e7f (patch) | |
| tree | 6bf50a6826e3c57542dd21eba0a7efa9258ea2a5 /src/ec/google/chromeec/ec.h | |
| parent | 9faab3122e13d767bd95dd0887235a368e94d573 (diff) | |
src/ec/google/chromeec: Get Type-C Mux info from EC (TCPM)
EC being the TCPM decides the mux configuration after negotiating with the
port partner on the Type-C port. The APIs added here will give the
current essential mux state information for a given port.
BUG=None
BRANCH=None
TEST=Built coreboot image and verified that using this patch mux is being
set for display during boot
Change-Id: If994a459288ef31b0e6da8c6cdfd0ce3a0303981
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/ec/google/chromeec/ec.h')
| -rw-r--r-- | src/ec/google/chromeec/ec.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/ec/google/chromeec/ec.h b/src/ec/google/chromeec/ec.h index 9d4e58842e..ad3768c025 100644 --- a/src/ec/google/chromeec/ec.h +++ b/src/ec/google/chromeec/ec.h @@ -27,6 +27,15 @@ int google_ec_running_ro(void); enum ec_image google_chromeec_get_current_image(void); void google_chromeec_init(void); int google_chromeec_pd_get_amode(uint16_t svid); +/* Check for the current mux state in EC + * in: int port physical port number of the type-c port + * out: uint8_t flags flags representing the status of the mux such as + * usb capability, dp capability, cable type, etc + */ +int google_chromeec_usb_get_pd_mux_info(int port, uint8_t *flags); +/* Returns data role and type of device connected */ +int google_chromeec_usb_pd_control(int port, bool *ufp, bool *dbg_acc, + uint8_t *dp_mode); int google_chromeec_wait_for_displayport(long timeout); /* Device events */ @@ -306,7 +315,7 @@ int google_chromeec_get_cmd_versions(int command, uint32_t *pmask); * of PD-capable USB ports according to the EC. * @return 0 on success, -1 on error */ -int google_chromeec_get_num_pd_ports(int *num_ports); +int google_chromeec_get_num_pd_ports(unsigned int *num_ports); /* Structure representing the capabilities of a USB-PD port */ struct usb_pd_port_caps { |