summaryrefslogtreecommitdiff
path: root/src/ec/compal
diff options
context:
space:
mode:
authorRuihai Zhou <zhouruihai@huaqin.corp-partner.google.com>2023-07-27 19:36:35 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-08-01 13:35:19 +0000
commitd1b8589583de2d34a3e8dcbe6b0f9e7522df7ca8 (patch)
tree38d682211984b3848d35682da03b71d25ea6da3b /src/ec/compal
parent40c645b1378acdfe2b167e943c954d2a12cf93c0 (diff)
drivers/mipi: sta_ili9882t: Change TReset-CMD from 1.1 ms to 20 ms
In the datasheet of ILI9882T [1] section 3.11 Power On/Off Sequence, the TReset-CMD (Reset to First Command in Display Sleep In Mode) should be larger than 10ms, but it's 1.1ms now. This may cause abnormal display as some commands may be lost during power on. Fix this and leave some margins by increasing TReset-CMD to 20ms. Also, to align with the kernel driver structure starry_ili9882t_init_cmd, add 20ms delay at the end of command. [1] ILI9882T_Datasheet_20220428.pdf BUG=b:293380212 TEST=Boot and display normally Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com> Change-Id: Ifdcaf0e34753fc906817c763f1c8e7389448d1dc Reviewed-on: https://review.coreboot.org/c/coreboot/+/76766 Reviewed-by: cong yang <yangcong5@huaqin.corp-partner.google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Yidi Lin <yidilin@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/ec/compal')
0 files changed, 0 insertions, 0 deletions