soc/amd: Add an option to select if SOC supports ESPI sub decode

Cezanne doesn't have eSPIx00034 register define in PPR. Currently only
Picasso need this option.

Change-Id: Icb8e8a1a59393849395125108bfaa884839ce10f
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48842
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

0 files changed, 0 insertions, 0 deletions