drivers/intel/fsp2_0: Do AP re-init after FSP-S if USE_INTEL_FSP_MP_INIT enable

This patch ensures that coreboot is able to take control of APs back
by doing a full AP re-initialization after FSP-S is done.

TEST=Able to see all cores available after booting to OS using below command
when coreboot is built with USE_INTEL_FSP_MP_INIT enable.

> cat /proc/cpuinfo

Without this CL :

shows only 1 core (only BSP)

With this CL :

shows all possible cores available (BSP + APs)

Change-Id: I247d8d1166c77bd01922323b6a0f14ec6640a666
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

4 files changed, 26 insertions, 0 deletions

diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
index e954a462a1..32140f4228 100644
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -14,6 +14,7 @@ romstage-$(CONFIG_MMA) += mma_core.c
 romstage-y += cbmem.c
 
 ramstage-y += debug.c
+ramstage-$(CONFIG_USE_INTEL_FSP_MP_INIT) += fsp_mpinit.c
 ramstage-$(CONFIG_RUN_FSP_GOP) += graphics.c
 ramstage-y += hand_off_block.c
 ramstage-$(CONFIG_DISPLAY_FSP_HEADER) += header_display.c
diff --git a/src/drivers/intel/fsp2_0/fsp_mpinit.c b/src/drivers/intel/fsp2_0/fsp_mpinit.c
new file mode 100644
index 0000000000..cda9269cb8
--- /dev/null
+++ b/src/drivers/intel/fsp2_0/fsp_mpinit.c
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <fsp/api.h>
+#include <intelblocks/mp_init.h>
+
+/*
+ * As per FSP integration guide:
+ * If bootloader needs to take control of APs back, a full AP re-initialization is
+ * required after FSP-S is completed and control has been transferred back to bootloader
+ */
+void do_mpinit_after_fsp(void)
+{
+	init_cpus();
+}
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index d2c556f916..e0cd96d4e6 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -75,6 +75,13 @@ void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg,
 	struct mma_config_param *mma_cfg);
 
 /*
+ * As per FSP integration guide:
+ * If bootloader needs to take control of APs back, a full AP re-initialization is
+ * required after FSP-S is completed and control has been transferred back to bootloader
+ */
+void do_mpinit_after_fsp(void);
+
+/*
  * # DOCUMENTATION:
  *
  * This file defines the interface between coreboot and the FSP 2.0 wrapper
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 663b1d7cfd..0b6540e1de 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -127,6 +127,10 @@ static void do_silicon_init(struct fsp_header *hdr)
 	fsp_debug_after_silicon_init(status);
 	fsps_return_value_handler(FSP_SILICON_INIT_API, status);
 
+	/* Reinitialize CPUs if FSP-S has done MP Init */
+	if (CONFIG(USE_INTEL_FSP_MP_INIT))
+		do_mpinit_after_fsp();
+
 	if (!CONFIG(PLATFORM_USES_FSP2_2))
 		return;