drivers/spi: move cbfs_spi.c location

The common boot device spi implementation is very much
specific to SPI flash. As such it should be moved into
that subdirectory. It's still a high-level option but
it correctly depends on BOOT_DEVICE_SPI_FLASH. Additionally
that allows the auto-selection of SPI_FLASH by a platform
selecting COMMON_CBFS_SPI_WRAPPER which allows for culling
of SPI_FLASH selections everywhere.

BUG=chrome-os-partner:56151

Change-Id: Ia2ccfdc9e1a4348cd91b381f9712d8853b7d2a79
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16212
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>

3 files changed, 92 insertions, 0 deletions

diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index b0187fda0d..030fa6cd12 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -13,6 +13,14 @@
 ## GNU General Public License for more details.
 ##
 
+config COMMON_CBFS_SPI_WRAPPER
+	bool
+	default n
+	depends on !ARCH_X86
+	depends on BOOT_DEVICE_SPI_FLASH
+	help
+	 Use common wrapper to interface CBFS to SPI bootrom.
+
 config SPI_FLASH
 	bool
 	default y if BOOT_DEVICE_SPI_FLASH
diff --git a/src/drivers/spi/Makefile.inc b/src/drivers/spi/Makefile.inc
index 6b4182e4e3..e976059fda 100644
--- a/src/drivers/spi/Makefile.inc
+++ b/src/drivers/spi/Makefile.inc
@@ -8,6 +8,7 @@ smm-$(CONFIG_DEBUG_SMI) += spiconsole.c
 endif
 
 ifeq ($(CONFIG_COMMON_CBFS_SPI_WRAPPER),y)
+bootblock-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
 bootblock-y += spi_flash.c
 bootblock-$(CONFIG_SPI_FLASH_EON) += eon.c
 bootblock-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
@@ -18,6 +19,7 @@ bootblock-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
 bootblock-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
 bootblock-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
 
+romstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
 romstage-$(CONFIG_SPI_FLASH) += spi_flash.c
 romstage-$(CONFIG_SPI_FLASH_EON) += eon.c
 romstage-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
@@ -28,6 +30,7 @@ romstage-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.c
 romstage-$(CONFIG_SPI_FLASH_WINBOND) += winbond.c
 romstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
 
+verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
 verstage-$(CONFIG_SPI_FLASH) += spi_flash.c
 verstage-$(CONFIG_SPI_FLASH_EON) += eon.c
 verstage-$(CONFIG_SPI_FLASH_GIGADEVICE) += gigadevice.c
@@ -40,6 +43,7 @@ verstage-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.c
 
 endif
 
+ramstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c
 ramstage-$(CONFIG_SPI_FLASH) += spi_flash.c
 
 # drivers
diff --git a/src/drivers/spi/cbfs_spi.c b/src/drivers/spi/cbfs_spi.c
new file mode 100644
index 0000000000..bbe9125dd5
--- /dev/null
+++ b/src/drivers/spi/cbfs_spi.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * This file provides a common CBFS wrapper for SPI storage. SPI driver
+ * context is expanded with the buffer descriptor used to store data read from
+ * SPI.
+ */
+
+#include <boot_device.h>
+#include <spi_flash.h>
+#include <symbols.h>
+#include <cbmem.h>
+
+static struct spi_flash *spi_flash_info;
+
+static ssize_t spi_readat(const struct region_device *rd, void *b,
+				size_t offset, size_t size)
+{
+	if (spi_flash_info->read(spi_flash_info, offset, size, b))
+		return -1;
+	return size;
+}
+
+static const struct region_device_ops spi_ops = {
+	.mmap = mmap_helper_rdev_mmap,
+	.munmap = mmap_helper_rdev_munmap,
+	.readat = spi_readat,
+};
+
+static struct mmap_helper_region_device mdev =
+	MMAP_HELPER_REGION_INIT(&spi_ops, 0, CONFIG_ROM_SIZE);
+
+static void switch_to_postram_cache(int unused)
+{
+	/*
+	 * Call boot_device_init() to ensure spi_flash is initialized before
+	 * backing mdev with postram cache. This prevents the mdev backing from
+	 * being overwritten if spi_flash was not accessed before dram was up.
+	 */
+	boot_device_init();
+	if (_preram_cbfs_cache != _postram_cbfs_cache)
+		mmap_helper_device_init(&mdev, _postram_cbfs_cache,
+					_postram_cbfs_cache_size);
+}
+ROMSTAGE_CBMEM_INIT_HOOK(switch_to_postram_cache);
+
+void boot_device_init(void)
+{
+	int bus = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS;
+	int cs = 0;
+
+	if (spi_flash_info != NULL)
+		return;
+
+	spi_flash_info = spi_flash_probe(bus, cs);
+
+	mmap_helper_device_init(&mdev, _cbfs_cache, _cbfs_cache_size);
+}
+
+/* Return the CBFS boot device. */
+const struct region_device *boot_device_ro(void)
+{
+	if (spi_flash_info == NULL)
+		return NULL;
+
+	return &mdev.rdev;
+}