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authorFurquan Shaikh <furquan@chromium.org>2016-10-24 15:28:23 -0700
committerFurquan Shaikh <furquan@google.com>2016-10-26 01:51:00 +0200
commitffb3a2d22506a86e205a757029f60abccfef0486 (patch)
tree1ec76ce253daf486920ec3d7fec1cb532d20145e /src/drivers/xgi
parent723a84e2920c8ba52257cf4bf445b23ff01d8754 (diff)
soc/intel/apollolake: Enable write-protect SPI flash range support
Use intel common infrastructure to enable support for write-protecting SPI flash range. Also, enable this protection for RW_MRC_CACHE. BUG=chrome-os-partner:58896 TEST=Verified that write to RW_MRC_CACHE fails in OS using "flashrom -p host -i RW_MRC_CACHE -w /tmp/test.bin" Change-Id: I35df12bc295d141e314ec2cb092d904842432394 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17117 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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