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author | Aaron Durbin <adurbin@chromium.org> | 2016-07-17 17:04:37 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-19 20:15:33 +0200 |
commit | b4302504e3770001bf267e0a58fa4dc7f17f6871 (patch) | |
tree | 9a13478601ad0367505cc7bcdc4d054d10542d3f /src/drivers/uart | |
parent | 27928685198ab911452a3d5f789fec90a575ad05 (diff) |
drivers/intel/fsp2_0: implement common memory_init() tasks
Instead of performing the same tasks in the chipset code move
the common sequences into the FSP 2.0 driver. This handles the
S3 paths as well as saving and restoring the memory data. The
chipset code can always override the settings if needed.
BUG=chrome-os-partner:52679
Change-Id: I098bf95139a0360f028a50aa50d16d264bede386
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15739
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/uart')
0 files changed, 0 insertions, 0 deletions