diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-05-07 09:04:46 -0700 |
---|---|---|
committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2016-05-09 18:45:44 +0200 |
commit | 6ec72c9b4f4a903d9a451bc17629e679399aa9ee (patch) | |
tree | 815f70ba90e3646911d8380d803c823f1fefb507 /src/drivers/uart/util.c | |
parent | 148762110c8a00c88b8e0326ec69dc7392bf3739 (diff) |
drivers/uart: Use uart_platform_refclk for all UART models
Allow the platform to override the input clock for the UART by
implementing the routine uart_platform_refclk and setting the Kconfig
value UART_OVERRIDE_REFCLK. Provide a default uart_platform_refclk
routine which is disabled when UART_OVERRIDE_REFCLK is selected. This
works around ROMCC not supporting weak routines.
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file:
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
UEFIPAYLOAD.fd
* Testing is successful when CorebootPayloadPkg is able to properly
initialize the serial port without using built-in values.
Change-Id: If4afc45a828e5ba935fecb6d95b239625e912d14
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/14612
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers/uart/util.c')
-rw-r--r-- | src/drivers/uart/util.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/drivers/uart/util.c b/src/drivers/uart/util.c index 5e8d223252..86da8dc746 100644 --- a/src/drivers/uart/util.c +++ b/src/drivers/uart/util.c @@ -59,3 +59,19 @@ unsigned int uart_input_clock_divider(void) return 16; } #endif + +#if !IS_ENABLED(CONFIG_UART_OVERRIDE_REFCLK) +unsigned int uart_platform_refclk(void) +{ + /* Specify the default input clock frequency for the UART. + * + * The older UART's used an input clock frequency of 1.8432 MHz which + * with the 16x oversampling provided the maximum baud-rate of 115200. + * Specify this as maximum baud-rate multiplied by oversample so that + * it is obvious that the maximum baud rate is 115200 when divided by + * oversample clock. Also note that crystal on the board does not + * change when software selects another input clock divider. + */ + return 115200 * 16; +} +#endif |