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authorGrzegorz Bernacki <bernacki@google.com>2023-06-14 12:01:32 +0000
committerFelix Held <felix-coreboot@felixheld.de>2023-07-06 16:16:43 +0000
commit7758b47e3be128ab8c1c3fecb63b8f0054351ee0 (patch)
tree626cdc57c8c0eb979e336af506da07b4e4ea77e0 /src/drivers/tpm/cr50.c
parent15d75aa999709ab2006b816f7c0335b52147f945 (diff)
drivers/tpm: Move tis_plat_irq_status to cr50 driver
tis_plat_irq_status() function is used only by Google TPM. It should be moved to drivers/tpm/cr50.c. The name of the function was changed to cr50_plat_irq_status(). BUG=b:277787305 TEST=Build all affected platforms Change-Id: I78dc39f2c7b44232b06947d3dfe6afa52807ced8 Signed-off-by: Grzegorz Bernacki <bernacki@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75917 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/drivers/tpm/cr50.c')
-rw-r--r--src/drivers/tpm/cr50.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/src/drivers/tpm/cr50.c b/src/drivers/tpm/cr50.c
index 25ce881d8a..5618b9db5d 100644
--- a/src/drivers/tpm/cr50.c
+++ b/src/drivers/tpm/cr50.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: BSD-3-Clause */
+#include <delay.h>
#include <drivers/spi/tpm/tpm.h>
#include <security/tpm/tis.h>
#include <string.h>
@@ -17,6 +18,8 @@
(CONFIG(CR50_USE_LONG_INTERRUPT_PULSES) \
? CR50_BOARD_CFG_100US_READY_PULSE : 0)
+#define CR50_TIMEOUT_NOIRQ_MS 20 /* Timeout for TPM ready without IRQ */
+
enum cr50_register {
CR50_FW_VER_REG,
CR50_BOARD_CFG_REG,
@@ -95,6 +98,20 @@ static uint32_t cr50_get_board_cfg(void)
return value & CR50_BOARD_CFG_FEATUREBITS_MASK;
}
+__weak int cr50_plat_irq_status(void)
+{
+ static int warning_displayed;
+
+ if (!warning_displayed) {
+ printk(BIOS_WARNING, "%s() not implemented, wasting 20ms to wait on Cr50!\n",
+ __func__);
+ warning_displayed = 1;
+ }
+ mdelay(CR50_TIMEOUT_NOIRQ_MS);
+
+ return 1;
+}
+
/**
* Set the BOARD_CFG register on the TPM chip to a particular compile-time constant value.
*/
@@ -235,7 +252,7 @@ enum cb_err cr50_wait_tpm_ready(void)
stopwatch_init_msecs_expire(&sw, CONFIG_GOOGLE_TPM_IRQ_TIMEOUT_MS);
- while (!tis_plat_irq_status())
+ while (!cr50_plat_irq_status())
if (stopwatch_expired(&sw)) {
printk(BIOS_ERR, "Cr50 TPM IRQ timeout!\n");
return CB_ERR;