diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2015-01-15 15:28:46 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-17 09:21:22 +0200 |
| commit | fb032398d262ff7594c35c65b6f14897bb331a39 (patch) | |
| tree | adc486e7b25eff3f8b425eb75c78a8f4da77bed0 /src/drivers/spi/sst.c | |
| parent | 1968b5801098ab1c549ed47e42f543aff1cb2637 (diff) | |
spi: Add function to read flash status register
Add a function that allows reading of the status register
from the SPI chip. This can be used to determine whether
write protection is enabled on the chip.
BUG=chrome-os-partner:35209
BRANCH=haswell
TEST=build and boot on peppy
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240702
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit c58f17689162b291a7cdb57649a237de21b73545)
Change-Id: Ib7fead2cc4ea4339ece322dd18403362c9c79c7d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9fbdf0d72892eef4a742a418a347ecf650c01ea5
Original-Change-Id: I2541b22c51e43f7b7542ee0f48618cf411976a98
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/241128
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/9730
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/drivers/spi/sst.c')
| -rw-r--r-- | src/drivers/spi/sst.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/drivers/spi/sst.c b/src/drivers/spi/sst.c index ecd792d46b..aab654c641 100644 --- a/src/drivers/spi/sst.c +++ b/src/drivers/spi/sst.c @@ -259,10 +259,12 @@ spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode) stm->flash.write = sst_write; stm->flash.erase = spi_flash_cmd_erase; + stm->flash.status = spi_flash_cmd_status; stm->flash.read = spi_flash_cmd_read_fast; stm->flash.sector_size = SST_SECTOR_SIZE; stm->flash.size = stm->flash.sector_size * params->nr_sectors; stm->flash.erase_cmd = CMD_SST_SE; + stm->flash.status_cmd = CMD_SST_RDSR; /* Flash powers up read-only, so clear BP# bits */ sst_unlock(&stm->flash); |