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authorFred Reitberger <reitbergerfred@gmail.com>2023-03-21 15:37:06 -0400
committerLean Sheng Tan <sheng.tan@9elements.com>2023-03-26 20:53:48 +0000
commit52be7f6b1091f2dbd2b73ea9ede6ef95caa4ea17 (patch)
tree60435ab3fbdfe5f8ad3377f94ac114b85a6ef219 /src/drivers/spi/Kconfig
parent75e720bf02c0db900a0cd2f0c47c7187fbb98b5f (diff)
drivers/spi: Add SPI_FLASH_FORCE_4_BYTE_ADDR_MODE
Add Kconfig option to force 4-byte addressing mode. Some platforms require the flash to stay in 4-byte addressing mode where it expects 4-byte addresses on regular commands. Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I2e41da2a78285c23c1c1d97eaf3969749812327b Reviewed-on: https://review.coreboot.org/c/coreboot/+/73860 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/drivers/spi/Kconfig')
-rw-r--r--src/drivers/spi/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index b7650dd31d..8c251d7fbc 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -173,6 +173,14 @@ config SPI_FLASH_EXIT_4_BYTE_ADDR_MODE
On flashes that don't support 4-byte addressing mode or where it is already
disabled, this command should be a no-op.
+config SPI_FLASH_FORCE_4_BYTE_ADDR_MODE
+ bool
+ default n
+ help
+ This will force coreboot to send addresses as 4-bytes instead of 3-bytes.
+ On some platforms with SPI flashes larger than 16MB, the SPI flash may need
+ to remain in 4-byte addressing mode.
+
endif # SPI_FLASH
config HAVE_EM100PRO_SPI_CONSOLE_SUPPORT