diff options
| author | Werner Zeh <werner.zeh@siemens.com> | 2021-11-16 07:31:44 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-17 14:26:47 +0000 |
| commit | 42b8835beb45c15c46621b6877d337b35df3bffd (patch) | |
| tree | 8fbe42372b8ffda525e21f530e2c62ccc368d557 /src/drivers/siemens/nc_fpga/Kconfig | |
| parent | 57d4bc63f03664240ed4d9585c288ac8e455ca4b (diff) | |
drivers/siemens/nc_fpga: Add POST code over PCI
So far POST codes were mapped on IO port 0x80 inside the NC FPGA which
was connected via the LPC bus to the host CPU. On recent x86 generations
the LPC bus was replaced with eSPI and not all Siemens boards have the
eSPI routed to the NC FPGA. In order to have POST codes visible on those
boards the display is accessible via PCI in addition.
This patch adds the feature of sending the POST codes to the NC FPGA via
a PCI mapped register.
Change-Id: Ie15686de49cface17830365d78fe7c54cce183a0
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Diffstat (limited to 'src/drivers/siemens/nc_fpga/Kconfig')
| -rw-r--r-- | src/drivers/siemens/nc_fpga/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/drivers/siemens/nc_fpga/Kconfig b/src/drivers/siemens/nc_fpga/Kconfig index 1cd797772f..f4f1e972ef 100644 --- a/src/drivers/siemens/nc_fpga/Kconfig +++ b/src/drivers/siemens/nc_fpga/Kconfig @@ -5,3 +5,8 @@ config DRIVER_SIEMENS_NC_FPGA config NC_FPGA_NOTIFY_CB_READY bool default n + +config NC_FPGA_POST_CODE + bool + default n + select EARLY_PCI_BRIDGE |