diff options
| author | Julius Werner <jwerner@chromium.org> | 2015-02-19 20:19:23 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-21 08:22:40 +0200 |
| commit | 941847652406982f3c9944fdd98cce4029b533fb (patch) | |
| tree | af52ebeaa0245c9a3aa1e25c77f2271b67bff4a8 /src/drivers/pc80 | |
| parent | 2f37bd65518865688b9234afce0d467508d6f465 (diff) | |
arm(64): Manually clean up the mess left by write32() transition
This patch is a manual cleanup of all the rubble left by coccinelle
waltzing through our code base. It's generally not very good with line
breaks and sometimes even eats comments, so this patch is my best
attempt at putting it all back together.
Also finally remove those hated writel()-style macros from the headers.
BRANCH=none
BUG=chromium:444723
TEST=None (depends on next patch)
Change-Id: Id572f69c420c35577701feb154faa5aaf79cd13e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 817402a80ab77083728b55aed74b3b4202ba7f1d
Original-Change-Id: I3b0dcd6fe09fc4e3b83ee491625d6dced98e3047
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254865
Reviewed-on: http://review.coreboot.org/9837
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/drivers/pc80')
| -rw-r--r-- | src/drivers/pc80/tpm/tpm.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/drivers/pc80/tpm/tpm.c b/src/drivers/pc80/tpm/tpm.c index 012f61dbed..22dbc41144 100644 --- a/src/drivers/pc80/tpm/tpm.c +++ b/src/drivers/pc80/tpm/tpm.c @@ -52,10 +52,6 @@ TPM_DEBUG("Write reg 0x%x with 0x%x\n", (reg_), (val_)) #define printf(x...) printk(BIOS_ERR, x) -#define readb(_a) (*(volatile unsigned char *) (_a)) -#define writeb(_v, _a) (*(volatile unsigned char *) (_a) = (_v)) -#define readl(_a) (*(volatile unsigned long *) (_a)) -#define writel(_v, _a) (*(volatile unsigned long *) (_a) = (_v)) /* coreboot wrapper for TPM driver (end) */ #ifndef CONFIG_TPM_TIS_BASE_ADDRESS |