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authorShuo Liu <shuo.liu@intel.com>2024-04-26 17:35:05 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-05-02 17:43:42 +0000
commita0aff6e15988f918b926c4cd222537d2f5a3f878 (patch)
tree593424f7bba43c6b2361f305334c3ac8eac3f6e1 /src/drivers/ocp
parentb25fa1cf9ee3ea51c4c183d2d7f3d79c0bf8d573 (diff)
soc/intel/xeon_sp: Add get_cxl_mode
Configuration variable implementation (VPD, et al) is regarded to be mainboard specific and should not be bounded to SoC codes. Add get_cxl_mode so that SoC codes do not need to get this configuration from VPD any more. TEST=Build and boot on intel/archercity CRB with no significant log differences Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Signed-off-by: Shuo Liu <shuo.liu@intel.com> Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82092 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/drivers/ocp')
-rw-r--r--src/drivers/ocp/include/vpd.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/drivers/ocp/include/vpd.h b/src/drivers/ocp/include/vpd.h
index 8ed6a56cee..bf0bc9265e 100644
--- a/src/drivers/ocp/include/vpd.h
+++ b/src/drivers/ocp/include/vpd.h
@@ -3,6 +3,8 @@
#ifndef OCP_VPD_H
#define OCP_VPD_H
+#include <include/types.h>
+
/* VPD variable for enabling/disabling FRB2 timer. 1/0: Enable/disable */
#define FRB2_TIMER "frb2_timer_enable"
#define FRB2_TIMER_DEFAULT 1 /* Default value when the VPD variable is not found */