diff options
| author | Shelly Chang <Shelly_Chang@wiwynn.com> | 2022-04-11 10:50:40 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-22 12:47:33 +0000 |
| commit | e17fc5dc0b2e398f0b434a871949f47c1bfa0329 (patch) | |
| tree | 19c7acf5f7ad838ce3e254c09b85d2c77c916a2d /src/drivers/ipmi/ocp | |
| parent | 930dbc0d0428e4e7726bd6f23acd3f5115dd85be (diff) | |
drivers/ocp/ewl: Add sending Meta's BMC SEL for memory training error
Add sending Meta's BMC SEL for memory training error occurred in EWL
type 3 error.
The detail definition of EWL (Enhanced Warning Log) can be found in the
specification document -- BIOS Data ACPI Table (BDAT) Interface
Specification v4.0 Draft 5:
https://uefi.org/sites/default/files/resources/BDAT%20Specification%20v4.0%20Draft5_0.pdf
Change-Id: I664e9d3da7910b47260881c0df64159c8dbe2dca
Signed-off-by: Shelly Chang <Shelly_Chang@wiwynn.com>
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69147
Reviewed-by: Jonathan Zhang <jon.zhixiong.zhang@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/ipmi/ocp')
| -rw-r--r-- | src/drivers/ipmi/ocp/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/drivers/ipmi/ocp/ipmi_ocp.h | 26 |
2 files changed, 27 insertions, 1 deletions
diff --git a/src/drivers/ipmi/ocp/Makefile.inc b/src/drivers/ipmi/ocp/Makefile.inc index 2b492e124d..3d5e69eb12 100644 --- a/src/drivers/ipmi/ocp/Makefile.inc +++ b/src/drivers/ipmi/ocp/Makefile.inc @@ -1,5 +1,5 @@ ramstage-$(CONFIG_IPMI_OCP) += ipmi_ocp.c ipmi_sel.c ifeq ($(CONFIG_IPMI_OCP),y) -romstage-$(CONFIG_IPMI_KCS_ROMSTAGE) += ipmi_ocp_romstage.c +romstage-$(CONFIG_IPMI_KCS_ROMSTAGE) += ipmi_ocp_romstage.c ipmi_sel.c smm-$(CONFIG_IPMI_BMC_SEL) += ipmi_sel.c endif diff --git a/src/drivers/ipmi/ocp/ipmi_ocp.h b/src/drivers/ipmi/ocp/ipmi_ocp.h index 571eafc731..d02eb35449 100644 --- a/src/drivers/ipmi/ocp/ipmi_ocp.h +++ b/src/drivers/ipmi/ocp/ipmi_ocp.h @@ -89,6 +89,16 @@ enum fail_type { PCIE_ECRC_EVNT = 5, }; +enum sel_err_type { + MEM_TRAINING_ERR = 0, + MEM_CORR_ERR = 1, + MEM_UNCORR_ERR = 2, + MEM_CORR_ERR_PATROL = 3, + MEM_UNCORR_ERR_PATROL = 4, + MEM_PARITY_ERR = 5, + MEM_UNDEFINED = 0xF, +}; + struct ipmi_sel_pcie_dev_fail { uint16_t record_id; uint8_t record_type; @@ -102,6 +112,21 @@ struct ipmi_sel_pcie_dev_fail { uint8_t rsvd2; } __packed; +struct ipmi_sel_mem_err { + uint16_t record_id; + uint8_t record_type; + uint8_t general_info; + uint32_t timestamp; + uint8_t socket; + uint8_t channel; + uint8_t dimm_slot; + uint8_t rsvd1; + uint8_t dimm_failure_type; + uint8_t major_code; + uint8_t minor_code; + uint8_t rsvd2; +} __packed; + struct ipmi_config_rsp { uint8_t board_sku_id; uint8_t board_rev_id; @@ -111,6 +136,7 @@ struct ipmi_config_rsp { #define SEL_RECORD_ID 0x01 #define SEL_PCIE_DEV_ERR 0x20 +#define SEL_INTEL_MEMORY_ERROR 0x21 #define SEL_PCIE_IIO_ERR 0x23 #define SEL_PCIE_DEV_FAIL_ID 0x29 |