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authorSridhar Siricilla <sridhar.siricilla@intel.com>2021-05-13 11:25:59 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-05-18 10:09:52 +0000
commita7bf0df24f7aca50309232d185366eb94355f34f (patch)
treed1148ed2c665400f4c4dae040668f0c1b04e8d0f /src/drivers/ipmi/ipmi_ops.h
parent8e7facf3437d633af747f6163cd66525ea14860e (diff)
mb/google/brya: Enable HECI1 communication
The patch enables HECI1 interface to allow OS applications to communicate with CSE. TEST=Verify PCI device 0:16.0 exposed in the lspci output Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I73acdd99788f9b60b7bcea372145e9694a124174 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54210 Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/ipmi/ipmi_ops.h')
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