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authorAngel Pons <th3fanbus@gmail.com>2021-01-20 13:31:09 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-01-30 23:12:32 +0000
commit1318ab475ddcae5fdd8f41b66c4d7034c8b3d396 (patch)
tree7c55e861f5f04f058402f449975d7b4938d3e755 /src/drivers/intel/soundwire
parentb274ec73ab608384c925876d5a3bcf0396dcc3d5 (diff)
nb/intel/pineview: Define and use MMCONF_BUS_NUMBER
Note that bootblock.c originally wrote a reserved bit of the PCIEXBAR register. The `length` bitfield was set to 0, so assume 256 busses. Change-Id: Ie967747b4bf559b5aedc67cbcd35bca51f5a692e Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49760 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel/soundwire')
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