diff options
author | Nico Huber <nico.h@gmx.de> | 2020-04-26 17:01:25 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2020-05-27 21:34:49 +0000 |
commit | f2a0be235cdf72caff549a1cfe0b986bdd99e93b (patch) | |
tree | d2e66798375f6b644c97206d65684b9f7e95ce9d /src/drivers/intel/gma/opregion.c | |
parent | 4dc4cb6b5c835ca947356a4d4e8c10228966bebc (diff) |
drivers/intel/gma: Move IGD OpRegion to CBMEM
It never was in GNVS, it never belonged among the ACPI tables. Having
it in CBMEM, makes it easy to look the location up on resume, and saves
us additional boilerplate.
TEST=Booted Linux on Lenovo/X201s, confirmed ASLS is set and
intel_backlight + acpi_video synchronize, both before and
after suspend.
Change-Id: I5fdd6634e4a671a85b1df8bc9815296ff42edf29
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40724
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel/gma/opregion.c')
-rw-r--r-- | src/drivers/intel/gma/opregion.c | 32 |
1 files changed, 20 insertions, 12 deletions
diff --git a/src/drivers/intel/gma/opregion.c b/src/drivers/intel/gma/opregion.c index 566f35101d..7682af199b 100644 --- a/src/drivers/intel/gma/opregion.c +++ b/src/drivers/intel/gma/opregion.c @@ -57,7 +57,7 @@ void *locate_vbt(size_t *vbt_size) } /* Write ASLS PCI register and prepare SWSCI register. */ -void intel_gma_opregion_register(uintptr_t opregion) +static void intel_gma_opregion_register(uintptr_t opregion) { struct device *igd; u16 reg16; @@ -94,17 +94,16 @@ void intel_gma_opregion_register(uintptr_t opregion) } /* Restore ASLS register on S3 resume and prepare SWSCI. */ -void intel_gma_restore_opregion(void) +static enum cb_err intel_gma_restore_opregion(void) { - if (acpi_is_wakeup_s3()) { - const void *const gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - uintptr_t aslb; - - if (gnvs && (aslb = gma_get_gnvs_aslb(gnvs))) - intel_gma_opregion_register(aslb); - else - printk(BIOS_ERR, "Error: GNVS or ASLB not set.\n"); + const igd_opregion_t *const opregion = cbmem_find(CBMEM_ID_IGD_OPREGION); + if (!opregion) { + printk(BIOS_ERR, "GMA: Failed to find IGD OpRegion.\n"); + return CB_ERR; } + /* Write ASLS PCI register and prepare SWSCI register. */ + intel_gma_opregion_register((uintptr_t)opregion); + return CB_SUCCESS; } static enum cb_err vbt_validate(struct region_device *rdev) @@ -224,14 +223,17 @@ static enum cb_err locate_vbt_vbios_cbfs(struct region_device *rdev) } /* Initialize IGD OpRegion, called from ACPI code and OS drivers */ -enum cb_err -intel_gma_init_igd_opregion(igd_opregion_t *opregion) +enum cb_err intel_gma_init_igd_opregion(void) { + igd_opregion_t *opregion; struct region_device rdev; optionrom_vbt_t *vbt = NULL; optionrom_vbt_t *ext_vbt; bool found = false; + if (acpi_is_wakeup_s3()) + return intel_gma_restore_opregion(); + /* Search for vbt.bin in CBFS. */ if (locate_vbt_cbfs(&rdev) == CB_SUCCESS && vbt_validate(&rdev) == CB_SUCCESS) { @@ -273,6 +275,12 @@ intel_gma_init_igd_opregion(igd_opregion_t *opregion) return CB_ERR; } + opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof(*opregion)); + if (!opregion) { + printk(BIOS_ERR, "GMA: Failed to add IGD OpRegion to CBMEM.\n"); + return CB_ERR; + } + memset(opregion, 0, sizeof(igd_opregion_t)); memcpy(&opregion->header.signature, IGD_OPREGION_SIGNATURE, |