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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-05-29 14:29:53 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-07 17:22:46 +0000 |
| commit | 46f6fcf88f2db397759f69d0c7ddf11d88b61e03 (patch) | |
| tree | c520011ec212b4fae6522f4f49b0f5149c10c15b /src/drivers/intel/fsp2_0/upd_display.c | |
| parent | 3a9cde9ab630fa34240b16f7e6ae10b5a61aa67e (diff) | |
dptf: Add support for Charger Performance States
This change generates the DPTF TCHG.PPSS table in the SSDT. This table
describes different charging rates which are available to use. DPTF
can pick different rates in order to passively cool (or not) the
system.
BUG=b:143539650
TEST=compiles
Change-Id: I6df6bfbac628fa4e4d313e38b8e6c53fce70a7f2
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41888
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0/upd_display.c')
0 files changed, 0 insertions, 0 deletions