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authorJulius Werner <jwerner@chromium.org>2021-04-12 17:00:16 -0700
committerJulius Werner <jwerner@chromium.org>2021-04-14 01:03:26 +0000
commit43c9d709c75813276f166da8b6bc7bc220e5288d (patch)
treee8d34d85dc8c16f4dd420d9f679834ebe2df1d4d /src/drivers/intel/fsp2_0/silicon_init.c
parentb3182fbb0021f725c302bf327663696ca0800a4d (diff)
intel: fsp2_0: Move last pieces to new CBFS API
This patch ports the last remaining use of cbfs_boot_locate() in the Intel FSP drivers to the new CBFS API. As a consequence, there is no longer a reason for fsp_validate_component() to operate on rdevs, and the function is simplified to take a direct void pointer and size to a memory-mapping of the FSP blob instead. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: If1f0239eefa4542e4d23f6e2e3ff19106f2e3c0d Reviewed-on: https://review.coreboot.org/c/coreboot/+/52281 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0/silicon_init.c')
-rw-r--r--src/drivers/intel/fsp2_0/silicon_init.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 6326d53622..53c962649a 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -204,10 +204,7 @@ void fsps_load(void)
if (resume_from_stage_cache()) {
printk(BIOS_DEBUG, "Loading FSPS from stage_cache\n");
stage_cache_load_stage(STAGE_REFCODE, fsps);
-
- struct region_device prog_rdev;
- prog_chain_rdev(fsps, &prog_rdev);
- if (fsp_validate_component(&fsps_hdr, &prog_rdev) != CB_SUCCESS)
+ if (fsp_validate_component(&fsps_hdr, prog_start(fsps), prog_size(fsps)))
die("On resume fsps header is invalid\n");
load_done = 1;
return;