aboutsummaryrefslogtreecommitdiff
path: root/src/drivers/intel/fsp2_0/include
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-09 22:53:52 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-02-09 07:53:23 +0000
commitcc93c6e47480de06ce87705a93bc46d806cabbb3 (patch)
tree4fa56de3a3e885246d3892c6897d954bf2e3ffb3 /src/drivers/intel/fsp2_0/include
parent4949a3dd626560aa504cee18d936d0d7602becfa (diff)
soc/amd,intel: Drop s3_resume parameter on FSP-S functions
ACPI S3 is a global state and it is no longer needed to pass it as a parameter. Change-Id: Id0639a47ea65c210b9a79e6ca89cee819e7769b1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50360 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/drivers/intel/fsp2_0/include')
-rw-r--r--src/drivers/intel/fsp2_0/include/fsp/api.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index 63018c58db..8561600714 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -33,7 +33,7 @@ enum fsp_notify_phase {
/* Main FSP stages */
void fsp_memory_init(bool s3wake);
-void fsp_silicon_init(bool s3wake);
+void fsp_silicon_init(void);
void fsp_temp_ram_exit(void);
/*
@@ -41,7 +41,7 @@ void fsp_temp_ram_exit(void);
* separately from calling silicon init. It might be required in cases where
* stage cache is no longer available by the point SoC calls into silicon init.
*/
-void fsps_load(bool s3wake);
+void fsps_load(void);
/* Callbacks for updating stage-specific parameters */
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version);