drivers/intel/fsp2_0: Fix running on x86_64

Add new Kconfig symbols to mark FSP binary as x86_32.
Fix the FSP headers and replace void pointers by fixed sized integers
depending on the used mode to compile the FSP.
This issue has been reported here:
https://github.com/intel/FSP/issues/59

This is necessary to run on x86_64, as pointers have different size.

Add preprocessor error to warn that x86_64 FSP isn't supported by the
current code.

Tested on Intel Skylake. FSP-M no longer returns the error "Invalid
Parameter".

Change-Id: I6015005c4ee3fc2f361985cf8cff896bcefd04fb
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48174
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

2 files changed, 24 insertions, 13 deletions

diff --git a/src/drivers/intel/fsp2_0/include/fsp/info_header.h b/src/drivers/intel/fsp2_0/include/fsp/info_header.h
index f237a378f1..aa9a435a75 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/info_header.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/info_header.h
@@ -4,6 +4,7 @@
 #define _FSP2_0_INFO_HEADER_H_
 
 #include <types.h>
+#include <commonlib/bsd/compiler.h>
 
 #define FSP_HDR_OFFSET			0x94
 #if CONFIG(PLATFORM_USES_FSP2_2)
@@ -16,24 +17,29 @@
 #define FSP_HDR_ATTRIB_FSPM		2
 #define FSP_HDR_ATTRIB_FSPS		3
 
+#if CONFIG(PLATFORM_USES_FSP2_X86_32)
 struct fsp_header {
 	uint32_t fsp_revision;
-	size_t image_size;
-	uintptr_t image_base;
+	uint32_t image_size;
+	uint32_t image_base;
 	uint16_t image_attribute;
 	uint8_t spec_version;
 	uint16_t component_attribute;
-	size_t cfg_region_offset;
-	size_t cfg_region_size;
-	size_t temp_ram_init_entry;
-	size_t temp_ram_exit_entry;
-	size_t notify_phase_entry_offset;
-	size_t memory_init_entry_offset;
-	size_t silicon_init_entry_offset;
-	size_t multi_phase_si_init_entry_offset;
+	uint32_t cfg_region_offset;
+	uint32_t cfg_region_size;
+	uint32_t temp_ram_init_entry;
+	uint32_t temp_ram_exit_entry;
+	uint32_t notify_phase_entry_offset;
+	uint32_t memory_init_entry_offset;
+	uint32_t silicon_init_entry_offset;
+	uint32_t multi_phase_si_init_entry_offset;
 	char image_id[sizeof(uint64_t) + 1];
 	uint8_t revision;
-};
+} __packed;
+#else
+#error You need to implement this struct for x86_64 FSP
+#endif
+
 
 enum cb_err fsp_identify(struct fsp_header *hdr, const void *fsp_blob);
 
diff --git a/src/drivers/intel/fsp2_0/include/fsp/upd.h b/src/drivers/intel/fsp2_0/include/fsp/upd.h
index 979cff3b91..827c95d980 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/upd.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/upd.h
@@ -21,6 +21,7 @@ struct FSP_UPD_HEADER {
 	uint8_t                       Reserved[23];
 } __packed;
 
+#if CONFIG(PLATFORM_USES_FSP2_X86_32)
 struct FSPM_ARCH_UPD {
 	///
 	/// Revision of the structure. For FSP v2.0 value is 1.
@@ -31,12 +32,12 @@ struct FSPM_ARCH_UPD {
 	/// Pointer to the non-volatile storage (NVS) data buffer.
 	/// If it is NULL it indicates the NVS data is not available.
 	///
-	void                        *NvsBufferPtr;
+	uint32_t                      NvsBufferPtr;
 	///
 	/// Pointer to the temporary stack base address to be
 	/// consumed inside FspMemoryInit() API.
 	///
-	void                        *StackBase;
+	uint32_t                      StackBase;
 	///
 	/// Temporary stack size to be consumed inside
 	/// FspMemoryInit() API.
@@ -53,7 +54,11 @@ struct FSPM_ARCH_UPD {
 	uint32_t                      BootMode;
 	uint8_t                       Reserved1[8];
 } __packed;
+#else
+#error You need to implement this struct for x86_64 FSP
+#endif
 
+#endif
 struct FSPS_ARCH_UPD {
 	///
 	/// Revision of the structure. For FSP v2.2 value is 1.