diff options
author | Pratik Prajapati <pratikkumar.v.prajapati@intel.com> | 2016-11-18 14:36:34 -0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-12-13 18:00:43 +0100 |
commit | ffc934d9440b5a8dabcedb4da0fa88d9a1e65e18 (patch) | |
tree | 2fd448d09b9a9c87ffbc6700f8ea25112f024e73 /src/drivers/intel/fsp2_0/Makefile.inc | |
parent | fa97cefbb3fad90573459e57845b658c9d3351a2 (diff) |
intel MMA: Enable MMA with FSP2.0
- Separate mma code for fsp1.1 and fsp2.0
and restructuring the code
- common code is placed in mma.c and mma.h
- mma_fsp<ver>.h and fsp<ver>/mma_core.c contains
fsp version specific code.
- whole MMA feature is guarded by CONFIG_MMA flag.
Change-Id: I12c9a1122ea7a52f050b852738fb95d03ce44800
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/17496
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0/Makefile.inc')
-rw-r--r-- | src/drivers/intel/fsp2_0/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index beeec7cee9..ad654b99eb 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -24,6 +24,7 @@ romstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c romstage-y += util.c romstage-y += memory_init.c romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c +romstage-$(CONFIG_MMA) += mma_core.c ramstage-y += debug.c ramstage-y += graphics.c @@ -36,6 +37,7 @@ ramstage-y += silicon_init.c ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c ramstage-y += util.c +ramstage-$(CONFIG_MMA) += mma_core.c postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c |