diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-30 14:53:24 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-16 11:51:07 +0000 |
| commit | 5c29daa150c5ba0a8acbdec90013f6526ac8d1f7 (patch) | |
| tree | bc8db9ff7e752d2532531bbd6dad8c8713841f39 /src/drivers/intel/fsp1_1 | |
| parent | f86baf3e903ddd81369b9ef7605fb5463498cbff (diff) | |
buildsystem: Promote rules.h to default include
Does not fix 3rdparty/, *.S or *.ld or yet.
Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/17656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/drivers/intel/fsp1_1')
| -rw-r--r-- | src/drivers/intel/fsp1_1/cache_as_ram.inc | 1 | ||||
| -rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/util.h | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.inc b/src/drivers/intel/fsp1_1/cache_as_ram.inc index 16712133e9..70e1ad716f 100644 --- a/src/drivers/intel/fsp1_1/cache_as_ram.inc +++ b/src/drivers/intel/fsp1_1/cache_as_ram.inc @@ -24,7 +24,6 @@ * performs the final stage of initialization. */ -#include <rules.h> #define LHLT_DELAY 0x50000 /* I/O delay between post codes on failure */ diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h index ffc43bc01c..0ad7a4117a 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/util.h +++ b/src/drivers/intel/fsp1_1/include/fsp/util.h @@ -17,7 +17,6 @@ #ifndef FSP1_1_UTIL_H #define FSP1_1_UTIL_H -#include <rules.h> #include <fsp/api.h> /* Current users expect to get the SoC's FSP definitions by including util.h. */ #include <fsp/soc_binding.h> |