fsp1_1: add verstage support

In order to support verstage the cache-as-ram split
is taken advantage of such that verstage has the
cache-as-ram setup and rosmtage has the cache-as-ram
tear down path. The verstage proper just initializes
the console and attempts to run romstage which triggers
the vboot verification of the firmware. In order to
pass the current FSP to use during romstage a global
variable in cache-as-ram is populated before returning
to the assembly code which tears down cache-as-ram.

BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built and booted glados with verstage support as well as
     VBOOT_DYNAMIC_WORK_BUFFER with direct link in romstage.

Change-Id: I8de74a41387ac914b03c9da67fd80f8b91e9e7ca
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11824
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

1 files changed, 28 insertions, 0 deletions

diff --git a/src/drivers/intel/fsp1_1/verstage.c b/src/drivers/intel/fsp1_1/verstage.c
new file mode 100644
index 0000000000..608cdea726
--- /dev/null
+++ b/src/drivers/intel/fsp1_1/verstage.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <fsp/car.h>
+#include <program_loading.h>
+
+void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
+{
+	run_romstage();
+	/* Will actually never return. */
+	return NULL;
+}