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authorElyes HAOUAS <ehaouas@noos.fr>2016-07-30 15:37:26 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 19:29:22 +0200
commit7753731f0cce2216574756e3e0101e4166fa3ef3 (patch)
tree413dd853852213248dec6588c1a81b8f5718c2b0 /src/drivers/intel/fsp1_1/romstage.c
parent038e7247dc9705ff2d47dd90ec9a807f6feb52ba (diff)
src/drivers: Capitalize CPU, RAM and ACPI
Change-Id: I720469ea1df75544f5b1e0cab718502d8a9cf197 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15983 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1/romstage.c')
-rw-r--r--src/drivers/intel/fsp1_1/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index b5d90c36dd..a95e5e602e 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -51,7 +51,7 @@ asmlinkage void *romstage_main(FSP_INFO_HEADER *fih)
timestamp_add_now(TS_START_ROMSTAGE);
- /* Load microcode before ram init */
+ /* Load microcode before RAM init */
if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS))
intel_update_microcode_from_cbfs();