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| author | Lin Huang <hl@rock-chips.com> | 2017-12-08 10:31:46 +0800 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2017-12-12 19:13:22 +0000 |
| commit | 318a03a417adead20bc2543319b45b68f6536588 (patch) | |
| tree | 6751e0d8b2d97bebab41cfb887f29613b8f23b11 /src/drivers/intel/fsp1_1/Kconfig | |
| parent | 19f67a392a9d802403b203ae5920e45307813276 (diff) | |
google/scarlet: support INNOLUX P097PFG panel
Add INNOLUX P097PFG panel timing. According to Scalet schematic,
if GPIO3_D4 get low status, it will use INNOLUX P097PFG panel;
if GPIO3_D4 get high status, it will use KD097d04 panel.
Change-Id: I43fa5d859a9a529a84c58a953b37d03953ce648a
Signed-off-by: Lin Huang <hl@rock-chips.com>
Reviewed-on: https://review.coreboot.org/22780
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/drivers/intel/fsp1_1/Kconfig')
0 files changed, 0 insertions, 0 deletions