diff options
author | York Yang <york.yang@intel.com> | 2015-04-23 13:00:20 -0700 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2015-04-24 21:15:41 +0200 |
commit | c13ad6c6df709fda1d70743a860a406643620b9e (patch) | |
tree | ab12decf6c4eec46e01a9c098b44cfc63327255c /src/drivers/intel/fsp1_0/fsp_util.c | |
parent | 11004878ce6241f157fa931c2fec60cfbc6b6c71 (diff) |
driver/intel/fsp: Correct the fastboot data (MRC data) printing length
Fastboot data in Intel FSP project is printed by hexdump32() in dword
length. So the data length needs to be divided by 4 when printing it.
Change-Id: I959d538bd6e60282882dd138045cc730b4bd8159
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: http://review.coreboot.org/9976
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/drivers/intel/fsp1_0/fsp_util.c')
-rwxr-xr-x[-rw-r--r--] | src/drivers/intel/fsp1_0/fsp_util.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c index a00cb81d64..ab67147459 100644..100755 --- a/src/drivers/intel/fsp1_0/fsp_util.c +++ b/src/drivers/intel/fsp1_0/fsp_util.c @@ -292,7 +292,7 @@ int save_mrc_data(void *hob_start) mrc_data->mrc_data_size); printk(BIOS_SPEW, "Fast boot data (includes align and checksum):\n"); - hexdump32(BIOS_SPEW, (void *)mrc_data->mrc_data, output_len); + hexdump32(BIOS_SPEW, (void *)mrc_data->mrc_data, output_len / 4); return (1); } #endif /* CONFIG_ENABLE_MRC_CACHE */ |