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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-05-29 14:46:19 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-07-07 17:23:16 +0000
commitbb5c255907378a5c5798b5dab3616df1e63d3ee7 (patch)
tree6998607d8ef4942b7c547131c121cd25264f61d7 /src/drivers/intel/dptf/dptf.c
parent2ad8ffed6fc3d0865d8dc066dcbf6ef2e369794c (diff)
dptf: Add support for Running Average Power Limits
This change adds support for emitting the PPCC table, which describes the ranges available as knobs for DPTF to tune. It can support min/max power, min/max time window for averaging, and the minimum adjustment size (granularity or step size) of each power limit. The current implementation only supports PL1 and PL2. BUG=b:143539650 TEST=compiles Change-Id: I67e80d661ea5bb79980ef285eca40c9a4b0f1849 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41890 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/drivers/intel/dptf/dptf.c')
-rw-r--r--src/drivers/intel/dptf/dptf.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/drivers/intel/dptf/dptf.c b/src/drivers/intel/dptf/dptf.c
index bfc04200e0..15a7d1297b 100644
--- a/src/drivers/intel/dptf/dptf.c
+++ b/src/drivers/intel/dptf/dptf.c
@@ -75,6 +75,7 @@ static void dptf_fill_ssdt(const struct device *dev)
/* Controls */
dptf_write_charger_perf(config->controls.charger_perf, DPTF_MAX_CHARGER_PERF_STATES);
dptf_write_fan_perf(config->controls.fan_perf, DPTF_MAX_FAN_PERF_STATES);
+ dptf_write_power_limits(&config->controls.power_limits);
printk(BIOS_INFO, "\\_SB.DPTF: %s at %s\n", dev->chip_ops->name, dev_path(dev));
}