From bb5c255907378a5c5798b5dab3616df1e63d3ee7 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Fri, 29 May 2020 14:46:19 -0600 Subject: dptf: Add support for Running Average Power Limits This change adds support for emitting the PPCC table, which describes the ranges available as knobs for DPTF to tune. It can support min/max power, min/max time window for averaging, and the minimum adjustment size (granularity or step size) of each power limit. The current implementation only supports PL1 and PL2. BUG=b:143539650 TEST=compiles Change-Id: I67e80d661ea5bb79980ef285eca40c9a4b0f1849 Signed-off-by: Tim Wawrzynczak Reviewed-on: https://review.coreboot.org/c/coreboot/+/41890 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie --- src/drivers/intel/dptf/dptf.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/drivers/intel/dptf/dptf.c') diff --git a/src/drivers/intel/dptf/dptf.c b/src/drivers/intel/dptf/dptf.c index bfc04200e0..15a7d1297b 100644 --- a/src/drivers/intel/dptf/dptf.c +++ b/src/drivers/intel/dptf/dptf.c @@ -75,6 +75,7 @@ static void dptf_fill_ssdt(const struct device *dev) /* Controls */ dptf_write_charger_perf(config->controls.charger_perf, DPTF_MAX_CHARGER_PERF_STATES); dptf_write_fan_perf(config->controls.fan_perf, DPTF_MAX_FAN_PERF_STATES); + dptf_write_power_limits(&config->controls.power_limits); printk(BIOS_INFO, "\\_SB.DPTF: %s at %s\n", dev->chip_ops->name, dev_path(dev)); } -- cgit v1.2.3