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authorJarried Lin <jarried.lin@mediatek.corp-partner.google.com>2024-11-08 20:10:48 +0800
committerYu-Ping Wu <yupingso@google.com>2024-11-13 02:26:54 +0000
commit2919a85be872d80d499de2c3f3421ccf83c68fd3 (patch)
tree9648b34a64a47378368c7c10313cc8b5b8f07fff /src/drivers/i2c/rtd2132/Makefile.mk
parent21c50ee098cb54eda8bdc7727477733fe553e6d2 (diff)
mb/google/rauru: Enlarge RW_MRC_CACHE from 8K to 16K
Rauru has MT8196 SoC. Following previous MediaTek SoCs, MT8196 will enable CACHE_MRC_SETTINGS, in order to store the DRAM parameters in the FMAP section RW_MRC_CACHE. As the size of the MT8196 parameters is larger (15968 bytes) compared to previous SoCs (7616 bytes), enlarge RW_MRC_CACHE from 8K to 16K. TEST=Build pass BUG=b:317009620 Change-Id: I35aad5a3a82686a68dd66e993355aa32cc19043e Signed-off-by: Jarried Lin <jarried.lin@mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85094 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yidi Lin <yidilin@google.com>
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