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author | Raul E Rangel <rrangel@chromium.org> | 2021-03-31 13:15:07 -0600 |
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committer | Martin Roth <martinroth@google.com> | 2021-04-05 19:25:26 +0000 |
commit | 92e66cc4e30f25e580ca25fa1c9a596ff53d83a2 (patch) | |
tree | e0a2e86584eea22c072abe3c4d47c8a732001d0a /src/drivers/i2c/max98373/chip.h | |
parent | 7a347afa955e6ab3931a7a0db8fee5bb3c04b9d3 (diff) |
soc/amd/cezanne: Add soc/msr.h
This is a copy of picasso.
BUG=b:184151560
TEST=Compared with the cezanne PPR.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ia4bc40daa971c126c2596837155312d411b91a06
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51983
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/drivers/i2c/max98373/chip.h')
0 files changed, 0 insertions, 0 deletions