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authorElyes HAOUAS <ehaouas@noos.fr>2016-11-13 17:48:13 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-28 12:26:08 +0000
commit2cc351da5f57e78b44eff50a5c1297a1ab2b79ee (patch)
tree39de65e51d26a8f5eb40d371e6d48baef1acaf80 /src/drivers/amd/agesa/cache_as_ram.S
parent680ed1f632897b3ec493156863b05115f28102ef (diff)
src/cpu/intel/model_f4x: Update cpu_table
CPUID 0xf47 tested on on 945G-M4 board. Needs more MSR's consistency tests. To do: test if speedstep.c and speedstep/acpi.c are ok for model_f4x. Change-Id: I285ad33804592e3df510d61dd24f14f944e05142 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/17409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/drivers/amd/agesa/cache_as_ram.S')
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