diff options
| author | Youness Alaoui <youness.alaoui@puri.sm> | 2017-05-24 17:47:27 -0400 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-09 17:01:27 +0200 |
| commit | 2f48b7b1e9e3d0a631c7d8951c1a5b5dc748df09 (patch) | |
| tree | 59694295c61211c41318a31a39582de0e681b6ab /src/device/pciexp_device.c | |
| parent | b191c9f0ab5e9c4fb3f355a0cc2674e7861b0a68 (diff) | |
pciexp_device: Remove useless write on a read-only register
The Role-Based Error Reporting is not a configurable field,
it's a read only field in the Device Capability register.
This code was old and comes from commit f6eb88ad but evidently
is not useful in any way. The PCIe Specification [1] states
that it's read-only and must always be set to 1.
I have also done tests on purism/librem13 hardware, trying to
change that value, without any success.
[1]: PCI Express Base Specification Revision 3.0
Page 612
Change-Id: I729617a5c6f4f52dfc4c422df78379b309066399
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19901
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/device/pciexp_device.c')
| -rw-r--r-- | src/device/pciexp_device.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index bc8206a6d4..b7ade0ad76 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -361,11 +361,6 @@ static void pciexp_enable_aspm(device_t root, unsigned root_cap, lnkctl = pci_read_config16(endp, endp_cap + PCI_EXP_LNKCTL); lnkctl |= apmc; pci_write_config16(endp, endp_cap + PCI_EXP_LNKCTL, lnkctl); - - /* Enable ASPM role based error reporting. */ - devcap = pci_read_config32(endp, endp_cap + PCI_EXP_DEVCAP); - devcap |= PCI_EXP_DEVCAP_RBER; - pci_write_config32(endp, endp_cap + PCI_EXP_DEVCAP, devcap); } printk(BIOS_INFO, "ASPM: Enabled %s\n", aspm_type_str[apmc]); |