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| author | Aaron Durbin <adurbin@chromium.org> | 2012-12-07 09:50:40 -0600 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-14 05:10:00 +0100 |
| commit | b6b5aa15cecf2a9226bf5c265f15bf905c90e558 (patch) | |
| tree | 517cf7791a5bec1b0012288a17ea46d045ebfa7b /src/device/pci_rom.c | |
| parent | 68724fd1e327d3e33c93bceec56973c0a4f7f505 (diff) | |
haswell: Remove logic to send dram init done to ME
The reference code sends the dram init done command to the ME.
Therefore, there is no need for coreboot to do this.
Change-Id: I6837d6c50bbb7db991f9d21fc9cdba76252c1b7b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2633
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/device/pci_rom.c')
0 files changed, 0 insertions, 0 deletions