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| author | Nico Huber <nico.huber@secunet.com> | 2016-10-05 17:46:49 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2016-11-29 23:45:40 +0100 |
| commit | c83239eabc3b09273294a013c4dcb84f09ab0241 (patch) | |
| tree | 6d3eacf46f8e5a7c5add0c58229093f7fd269520 /src/device/pci_ops.c | |
| parent | 079b5c65c3347d2539a6b3d7d88a194f2d66ad40 (diff) | |
Hook up libhwbase in ramstage
It's hidden behind a configuration option `CONFIG_RAMSTAGE_LIBHWBASE`.
This also adds some glue code to use the coreboot console for debug
output and our monotonic timer framework as timer backend.
v2: Also update 3rdparty/libhwbase to the latest master commit.
Change-Id: I8e8d50271b46aac1141f95ab55ad323ac0889a8d
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16951
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/device/pci_ops.c')
0 files changed, 0 insertions, 0 deletions