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authorV Sowmya <v.sowmya@intel.com>2020-09-02 16:40:24 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-09-15 07:02:04 +0000
commit186250f68e432f0c32b0c9909be6008cbc6aca47 (patch)
tree6e67e0a189e9859e584b9fac6593afbda19ecb3c /src/device/pci_ops.c
parent98b0a988919e905e8cf4901a4471d7ab50f8a7c9 (diff)
common/block/pmc: Add a check to program the PchPmPwrCycDur
This patch adds a check to avoid violating the PCH EDS recommendation that the PchPmPwrCycDur will never be smaller than the the SLP_Sx assertion widths. This code was initially added for cannonlake and now moving it to common code since the same check will be used to program the PchPmPwrCycDur for Jasperlake and Tigerlake. Change-Id: Ie7d5f54939c5eb1f885d303f75a04958b9d77f4d Signed-off-by: V Sowmya <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45028 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/pci_ops.c')
0 files changed, 0 insertions, 0 deletions