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authorSubrata Banik <subrata.banik@intel.com>2021-06-04 16:47:19 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-06-05 19:54:43 +0000
commit2cfb83fcf360b8d688f003eeb557111c5961e312 (patch)
tree21f3d8bd13b7d13a2dc0cdd1ca94a172a5aaa6d0 /src/device/oprom/x86emu/debug.h
parentc000057aa60f710c2b515f6a0e86fb407e2686d8 (diff)
mb/intel/adlrvp: Use device aliases
Use the device aliases provided by alderlake chipset.cb instead of the raw pci device+function. Take advantage of the default states in chipset.cb and only list the devices that are enabled for all different adlrvp boards. TEST=Dump devicetree device enable list without and with this CL, no difference observed. Change-Id: Ib9e82d953416c076588974f3167d00ae96f01bb5 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55205 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/oprom/x86emu/debug.h')
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