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author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2024-09-16 10:56:40 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-09-18 21:54:07 +0000 |
commit | 5d96f0d2e8c166d63e409ff4684cb445458f4c3e (patch) | |
tree | d20e8a78808028be4b0fd99a7c58b82d2f0cb220 /src/device/dram | |
parent | 0f9de13d3a9d55af08956fccef05e674f16d24b3 (diff) |
mb/siemens/{mc_ehl2,mc_ehl3,mc_ehl5}: Enable real-time tuning in FSP
The real-time feature should also be activated for all mc_ehl
mainboards, as it has already been done for mainboard mc_ehl1. It
improves performance in the real-time environment for these mainboards.
Change-Id: I04859b2f32bc11344b0620925f2414e7a6df625e
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84391
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/dram')
0 files changed, 0 insertions, 0 deletions