diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-05-20 18:26:18 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-06-12 22:42:12 +0000 |
| commit | 2c102232e8f74cff55e1ee75f785781ab27111dd (patch) | |
| tree | 48b1f51165b054b741c4018f80df54109cde8e56 /src/device/dram/ddr3.c | |
| parent | 7df7d8dd4b2d67f336995daeee381a07787d9db3 (diff) | |
mb/amd/chausie,google/skyrim: increase RW_MRC_CACHE size to 120 kByte
The APOB data in DRAM is larger than the 96 kBytes of RW_MRC_CACHE, so
it won't fit in the flash and makes soc_update_apob_cache return early
before writing the APOB data from DRAM into the flash with this warning:
[WARN ] RAM APOB data is too large 1db18 > 18000
Increasing the RW_MRC_CACHE size to 120 kByte fixes this.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I763d20f504d4f5b7cea68f21f409de9a1035f440
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64555
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/dram/ddr3.c')
0 files changed, 0 insertions, 0 deletions