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| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-16 12:39:23 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-06-21 04:25:51 +0000 |
| commit | 12d31b2764851f119985192419d2c986b48b54e0 (patch) | |
| tree | 9e4f08efbaf5fbd39a49978b2b1ba064db2119e6 /src/device/dram/ddr2.c | |
| parent | 621ed4c06c8c8761e083c550c0edf3c9c66793c9 (diff) | |
southbridge/amd: Create ACPI MCFG MMCONFIG
These southbridges are paired with MMCONF-enabled northbridges.
Change-Id: I0416de6425bb57471856731ad12ce8194ac98be2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55572
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/device/dram/ddr2.c')
0 files changed, 0 insertions, 0 deletions