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authorMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2022-08-22 17:27:11 -0500
committerMartin L Roth <gaumless@gmail.com>2022-08-25 01:00:44 +0000
commitbb9d106eab6212229fb1d6d4645f93bb883850ac (patch)
tree9b3b1448c16703f3e9e695d5f38b81561b71b2d3 /src/device/dram/Makefile.inc
parent65fe21f1c96a0762ba764fe47c8dc1d9cb7ee217 (diff)
device/dram: Add function to convert freq to MT/s for (LP)DDR5
As the frequency field in the SMBIOS type 17 table is deprecated, we need to provide the maximum and configured speed in MT/s. Add a method to convert from frequency to MT/s using a lookup table. BUG=b:239000826 TEST=Build and verify with other patches in train Change-Id: I0402b33a667f7d72918365a6a79b13c5b1719c0d Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/device/dram/Makefile.inc')
-rw-r--r--src/device/dram/Makefile.inc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/device/dram/Makefile.inc b/src/device/dram/Makefile.inc
index b91b128f85..31dfb91d7f 100644
--- a/src/device/dram/Makefile.inc
+++ b/src/device/dram/Makefile.inc
@@ -1,3 +1,3 @@
-romstage-y += lpddr4.c ddr4.c ddr3.c ddr2.c ddr_common.c
+romstage-y += ddr5.c lpddr4.c ddr4.c ddr3.c ddr2.c ddr_common.c
-ramstage-y += lpddr4.c ddr4.c ddr3.c ddr2.c ddr_common.c spd.c
+ramstage-y += ddr5.c lpddr4.c ddr4.c ddr3.c ddr2.c ddr_common.c spd.c