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authorJamie Ryu <jamie.m.ryu@intel.com>2020-05-18 10:13:31 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:38:34 +0000
commit5131c6f79a74b6f24720bab8322e9cd946e74807 (patch)
treeaf340764a26e000fac2aa60c3335bf3bfee8738d /src/device/cardbus_device.c
parent04506e2987162ec0f280afddd6f4acac070bbf15 (diff)
soc/intel/tigerlake: Add CPU ID for TGL B0
Reference: - TGL User Guide #613584 Rev 2.2 - TGL User Guide #605534 Rev 1.0 BRANCH=none BUG=none TEST=build and boot tglrvp Change-Id: I5da80fd4ad321b1ded369c2b6c039b73fcb3773e Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41516 Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/device/cardbus_device.c')
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