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authorRonak Kanabar <ronak.kanabar@intel.com>2022-02-11 15:50:22 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-02-16 20:17:46 +0000
commit53c2250dbf6d21d9083ca2b32e21ffcc2be6b3f1 (patch)
treefb57bf40073e797b20ae8e65bb928d592783e690 /src/device/Kconfig
parent83881e7824c05acd45c143d0328a4ef4ab9bc8fe (diff)
vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v2503_00
The headers added are generated as per Alder Lake N FSP v2503_00. Previous FSP version was v2503_00. Change include: Add following Emmc UPDs in Fsps.h - ScsEmmcEnabled - ScsEmmcHs400Enabled - EmmcUseCustomDlls - EmmcTxCmdDelayRegValue - EmmcTxDataDelay1RegValue - EmmcTxDataDelay2RegValue - EmmcRxCmdDataDelay1RegValue - EmmcRxCmdDataDelay2RegValue - EmmcRxStrobeDelayRegValue BUG=b:213828776 BRANCH=None Change-Id: I617673a0cb12e7165f2f63cce73fff38bc7bf827 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61857 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
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