diff options
| author | Martin Roth <gaumless@gmail.com> | 2023-09-03 21:38:29 -0600 |
|---|---|---|
| committer | Elyes Haouas <ehaouas@noos.fr> | 2023-09-08 00:53:57 +0000 |
| commit | 74f18777a2e6919172a4214c3195bfcc48f48407 (patch) | |
| tree | 792af40f72ed0f4287239a707acce3edbe89c9d2 /src/cpu | |
| parent | cef239675b46ffec6c3c4a99875329f0ee92a6b5 (diff) | |
arch to drivers/intel: Fix misspellings & capitalization issues
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ic52f01d1d5d86334e0fd639b968b5eed43a35f1d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77633
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/x86/lapic/apic_timer.c | 2 | ||||
| -rw-r--r-- | src/cpu/x86/mp_init.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c index 01a67fa6b1..2bb66eb8c0 100644 --- a/src/cpu/x86/lapic/apic_timer.c +++ b/src/cpu/x86/lapic/apic_timer.c @@ -33,7 +33,7 @@ void udelay(u32 usecs) timer_fsb = get_timer_fsb(); } - /* Calculate the number of ticks to run, our FSB runs at timer_fsb Mhz + /* Calculate the number of ticks to run, our FSB runs at timer_fsb MHz */ ticks = usecs * timer_fsb; start = lapic_read(LAPIC_TMCCT); diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 6809f812d7..642667b41b 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -777,7 +777,7 @@ static enum cb_err install_permanent_handler(int num_cpus, uintptr_t smbase, size_t smsize, size_t save_state_size) { /* - * All the CPUs will relocate to permanaent handler now. Set parameters + * All the CPUs will relocate to permanent handler now. Set parameters * needed for all CPUs. The placement of each CPUs entry point is * determined by the loader. This code simply provides the beginning of * SMRAM region, the number of CPUs who will use the handler, the stack |